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Электронный компонент: TPS79925DDCT

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FEATURES
APPLICATIONS
DESCRIPTION
IN
N/C
EN
6
5
4
OUT
NR
GND
1
2
3
GND
TPS799xxDRV
2mm x 2mm SON-6
(TOP VIEW)
IN
N/C
EN
6
5
4
OUT
FB
GND
1
2
3
TPS79901DRV
2mm x 2mm SON-6
(TOP VIEW)
GND
TPS799xxDDC
TSOT23-5
(TOP VIEW)
OUT
NR
IN
GND
EN
1
2
3
5
4
TPS799xxYZU
WCSP
(TOP VIEW)
C3
C1
B2
A3
A1
OUT
EN
IN
GND
NR
TPS79901YZU
WCSP
(TOP VIEW)
OUT
EN
IN
GND
FB
C3
C1
B2
A3
A1
TPS79901DDC
TSOT23-5
(TOP VIEW)
OUT
FB
IN
GND
EN
1
2
3
5
4
TPS799xx
SBVS056E JANUARY 2005 REVISED OCTOBER 2005
200mA, Low Quiescent Current, Ultra-Low Noise, High PSRR
Low Dropout Linear Regulator
Cellular Phones
200mA Low Dropout Regulator with EN
Wireless LAN, BluetoothTM
Low I
Q
: 40A
VCOs, RF
Available in Multiple Output Voltage Versions:
Handheld Organizers, PDAs
Fixed Outputs of 1.2V, 1.5V, 1.6V, 1.8V, 1.9V,
2.5V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0V, 3.2V, and
3.3V
The
TPS799xx
family
of
low-dropout
(LDO)
Adjustable Outputs from 1.2V to 6.5V
low-power
linear
regulators
offer
excellent
AC
Additional Outputs Available Using
performance with very low ground current. High
Innovative Factory EEPROM Programming
power-supply rejection ratio (PSRR), low noise, fast
High PSRR: 66dB at 1kHz
start-up,
and
excellent
line
and
load
transient
response are provided while consuming a very low
Ultra-low Noise: 29.5V
RMS
40A (typical) ground current. The TPS799xx is
Fast Start-Up Time: 45s
stable with ceramic capacitors and uses an advanced
Stable with a Low-ESR, 2.0F Typical Output
BiCMOS fabrication process to yield dropout voltage
Capacitance
typically 110mV at 200mA output. The TPS799xx
uses a precision voltage reference and feedback loop
Excellent Load/Line Transient Response
to achieve overall accuracy of 2% over all load, line,
2% Overall Accuracy (Load/Line/Temp)
process, and temperature variations. It
is
fully
Very Low Dropout: 100mV
specified from T
J
= -40C to +125C and is offered in
low profile ThinSOT23, Wafer Chip-Scale (WCSP),
ThinSOT-23, WCSP, and 2mm x 2mm SON-6
and 2mm x 2mm SON packages, ideal for wireless
Packages
handsets and WLAN cards.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Bluetooth is a trademark of Bluetooth SIG, Inc.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright 2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATINGS
TPS799xx
SBVS056E JANUARY 2005 REVISED OCTOBER 2005
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
PRODUCT
V
OUT
(2)
TPS799xxyyyz
XX is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable).
(3)
YYY is package designator.
Z is package quantity.
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at
www.ti.com
.
(2)
Output voltages from 1.2V to 4.5V in 50mV increments are available through the use of innovative factory EEPROM programming;
minimum order quantities may apply. Contact factory for details and availability.
(3)
For fixed 1.2V operation, tie FB to OUT.
Over operating temperature range (unless otherwise noted)
(1)
PARAMETER
TPS799xx
UNIT
V
IN
range
0.3 to +7.0
V
V
EN
range
0.3 to V
IN
+0.3
V
V
OUT
range
0.3 to V
IN
+0.3
V
Peak output current
Internally limited
Continuous total power dissipation
See Dissipation Ratings Table
Junction temperature range, T
J
55 to +150
C
Storage junction temperature range , T
STG
55 to +150
C
ESD rating, HBM
2
kV
ESD rating, CDM
500
V
(1)
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
DERATING FACTOR
BOARD
PACKAGE
R
JC
R
JA
ABOVE T
A
= 25C
T
A
< 25C
T
A
= 70C
T
A
= 85C
Low-K
(1)
DDC
90C/W
280C/W
3.6mW/C
360mW
200mW
145mW
High-K
(2)
DDC
90C/W
200C/W
5.0mW/C
500mW
275mW
200mW
Low-K
(1)
YZU
27C/W
255C/W
3.9mW/C
390mW
215mW
155mW
High-K
(2)
YZU
27C/W
190C/W
5.3mW/C
530mW
295mW
215mW
Low-K
(1)
DRV
20C/W
140C/W
7.1mW/C
715mW
395mW
285mW
High-K
(2)
DRV
20C/W
65C/W
15.4mW/C
1540mW
845mW
615mW
(1)
The JEDEC low-K (1s) board used to derive this data was a 3in x 3in, two-layer board with 2-ounce copper traces on top of the board.
(2)
The JEDEC high-K (2s2p) board used to derive this data was a 3in x 3in, multilayer board with 1-ounce internal power and ground
planes and 2-ounce copper traces on top and bottom of the board.
2
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ELECTRICAL CHARACTERISTICS
TPS799xx
SBVS056E JANUARY 2005 REVISED OCTOBER 2005
Over operating temperature range (T
J
= 40C to +125C), V
IN
= V
OUT(TYP)
+ 0.3V or 2.7V, whichever is greater; I
OUT
= 1mA,
V
EN
= V
IN
, C
OUT
= 2.2F, C
NR
= 0.01F, unless otherwise noted. For TPS79901, V
OUT
= 3.0V.
Typical values are at T
J
= +25C.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
IN
Input voltage range
(1)
2.7
6.5
V
V
FB
Internal reference (TPS79901)
1.169
1.193
1.217
V
V
OUT
Output voltage range (TPS79901)
V
FB
6.5-V
DO
V
V
OUT
Output accuracy
Nominal
T
J
= +25C
-1.0
+1.0
%
Over V
IN
,
V
OUT
+ 0.3V
V
IN
6.5V
V
OUT
Output accuracy
(1)
-2.0
1.0
+2.0
%
I
OUT
, Temp
500A
I
OUT
200mA
V
OUT
%/
V
IN
Line regulation
(1)
V
OUT(NOM)
+ 0.3V
V
IN
6.5V
0.02
%/V
V
OUT
%/
I
OUT
Load regulation
500A
I
OUT
200mA
0.002
%/mA
Dropout voltage
(2)
V
DO
V
OUT
< 3.3V I
OUT
= 200mA
100
175
mV
(V
IN
= V
OUT(NOM)
- 0.1V)
Dropout voltage
V
DO
V
OUT
3.3V
I
OUT
= 200mA
90
160
mV
(V
IN
= V
OUT(NOM)
- 0.1V)
I
CL
Output current limit
V
OUT
= 0.9 V
OUT(NOM)
200
400
600
mA
I
GND
Ground pin current
500A
I
OUT
200mA
40
60
A
I
SHDN
Shutdown current (I
GND
)
V
EN
0.4V, 2.7V
V
IN
6.5V
0.15
1.0
A
I
FB
Feedback pin current (TPS79901)
-0.5
0.5
A
f = 100Hz
70
dB
Power-supply rejection ratio
f = 1kHz
66
dB
PSRR
V
IN
= 3.85V, V
OUT
= 2.85V,
f = 10kHz
51
dB
C
NR
= 0.01F, I
OUT
= 100mA
f = 100kHz
38
dB
C
NR
= 0.01F
29.5
V
RMS
Output noise voltage
V
N
BW = 10Hz to 100kHz, V
OUT
= 2.8V
C
NR
= none
263
V
RMS
C
NR
= 0.001F
45
s
Startup time
C
NR
= 0.047F
45
s
T
STR
V
OUT
= 2.85V,
C
NR
= 0.01F
50
s
R
L
= 14
, C
OUT
= 2.2F
C
NR
= none
50
s
V
EN(HI)
Enable high (enabled)
1.2
V
IN
V
V
EN(LO)
Enable low (shutdown)
0
0.4
V
I
EN(HI)
Enable pin current, enabled
V
EN
= V
IN
= 6.5V
0.03
1.0
A
Shutdown, temperature increasing
165
C
TSD
Thermal shutdown temperature
Reset, temperature decreasing
145
C
T
J
Operating junction temperature
40
+125
C
Under voltage lockout
V
IN
rising
1.90
2.20
2.50
V
UVLO
Hysteresis
V
IN
falling
70
mV
(1)
Minimum V
IN
= V
OUT
+ V
DO
or 2.7V, whichever is greater.
(2)
V
DO
is not measured for devices with V
OUT(NOM)
< 2.8V because minimum V
IN
= 2.7V.
3
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DEVICE INFORMATION
FUNCTIONAL BLOCK DIAGRAMS
Thermal
Shutdown
UVLO
Current
Limit
2
A
Overshoot
Detect
500k
Quickstart
1.193V
Bandgap
IN
EN
NR
OUT
GND
400
Thermal
Shutdown
UVLO
Current
Limit
3.3M
Overshoot
Detect
500k
1.193V
Bandgap
IN
EN
FB
OUT
GND
400
PIN CONFIGURATIONS
IN
N/C
EN
6
5
4
OUT
NR
GND
1
2
3
GND
TPS799xxDRV
2mm x 2mm SON-6
(TOP VIEW)
IN
N/C
EN
6
5
4
OUT
FB
GND
1
2
3
TPS79901DRV
2mm x 2mm SON-6
(TOP VIEW)
GND
TPS799xxDDC
TSOT23-5
(TOP VIEW)
OUT
NR
IN
GND
EN
1
2
3
5
4
TPS799xxYZU
WCSP
(TOP VIEW)
C3
C1
B2
A3
A1
OUT
EN
IN
GND
NR
TPS79901YZU
WCSP
(TOP VIEW)
OUT
EN
IN
GND
FB
C3
C1
B2
A3
A1
TPS79901DDC
TSOT23-5
(TOP VIEW)
OUT
FB
IN
GND
EN
1
2
3
5
4
TPS799xx
SBVS056E JANUARY 2005 REVISED OCTOBER 2005
Figure 1. Fixed Voltage Versions
Figure 2. Adjustable Voltage Versions
Table 1. PIN DESCRIPTIONS
TPS799xx
NAME
DDC
YZU
DRV
DESCRIPTION
IN
1
C3
6
Input supply.
GND
2
B2
3, Pad
Ground. The pad must be tied to GND.
Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator
EN
3
A1
4
into shutdown mode. EN can be connected to IN if not used.
Fixed voltage versions only; connecting an external capacitor to this pin bypasses noise
NR
4
A3
2
generated by the internal bandgap. This allows output noise to be reduced to very low levels.
Adjustable version only; this is the input to the control loop error amplifier, and is used to set
FB
4
A3
2
the output voltage of the device.
Output of the regulator. A small capacitor (total typical capacitance
2.0
F ceramic) is
OUT
5
C1
1
needed from this pin to ground to assure stability.
N/C
--
--
5
Not internally connected. This pin must either be left open, or tied to GND.
4
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TYPICAL CHARACTERISTICS
2.5
3.5
4.5
5.5
6.5
V
IN
(V)
1.0
0.8
0.6
0.4
0.2
0
-
0.2
-
0.4
-
0.6
-
0.8
-
1.0
C
h
a
n
g
e
i
n
V
O
U
T
(
%
)
7.5
I
OUT
= 100mA
T
J
= +125
C
T
J
= +85
C
T
J
= -40
C
T
J
= +25
C
0
50
100
150
200
I
OUT
(mA)
28.50
21.38
14.25
7.13
0
-
7.13
-
14.25
-
21.38
-
28.50
C
h
a
n
g
e
i
n
V
O
U
T
(
m
V
)
T
J
= +125
C
T
J
= +85
C
T
J
= -40
C
T
J
= +25
C
200
180
160
140
120
100
80
60
40
20
0
V
D
O
(
m
V
)
0
50
100
150
200
I
OUT
(mA)
T
J
= +85
_
C
T
J
=
-
40
_
C
T
J
= +125
_
C
T
J
= +25
_
C
T
J
(
C)
2.0
1.5
1.0
0.5
0
-
0.5
-
1.0
-
1.5
-
2.0
C
h
a
n
g
e
i
n
V
O
U
T
(
%
)
I
OUT
= 100mA
I
OUT
= 200mA
I
OUT
= 1mA
-
40
-
25
5
35
65
95
50
125
-
15
20
80
110
110
100
90
80
70
60
50
40
30
20
10
0
V
D
O
(
m
V
)
2.5
3.0
3.5
4.0
5.0
6.0
7.0
4.5
5.5
6.5
V
IN
(V)
I
OUT
= 200mA
T
J
(
C)
200
180
160
140
120
100
80
60
40
20
0
V
D
O
(
m
V
)
5
35
65
95
50
125
20
80
110
I
OUT
= 100mA
I
OUT
= 200mA
I
OUT
= 1mA
-
40
-
25
-
15
TPS799xx
SBVS056E JANUARY 2005 REVISED OCTOBER 2005
Over operating temperature range (T
J
=- 40C to +125C), V
IN
=V
OUT(TYP)
+ 0.3V or 2.7V, whichever is greater; I
OUT
=1mA,
V
EN
= V
IN
, C
OUT
=2.2F, C
NR
=0.01F, unless otherwise noted. For TPS79901, V
OUT
=3.0V. Typical values are at T
J
=+25C.
LOAD REGULATION
LINE REGULATION
Figure 3.
Figure 4.
OUTPUT VOLTAGE vs
TPS799285 DROPOUT VOLTAGE vs
JUNCTION TEMPERATURE
OUTPUT CURRENT
Figure 5.
Figure 6.
TPS799285 DROPOUT VOLTAGE vs
TPS79901 DROPOUT vs
JUNCTION TEMPERATURE
INPUT VOLTAGE
Figure 7.
Figure 8.
5
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60
50
40
30
20
10
0
I
G
N
D
(
A
)
2.5
3.0
4.5
5.5
6.5
V
IN
(V)
7.0
3.5
4.0
5.0
6.0
I
OUT
= 200mA
I
OUT
= 500
A
60
50
40
30
20
10
0
I
G
N
D
(
A
)
V
IN
= 5.0V
V
IN
= 3.2V
V
IN
= 2.7V
(dropout)
V
OUT
= 2.85V
I
OUT
= 200mA
-
40
-
25
5
35
65
95
50
125
-
15
20
80
110
T
J
(
C)
90
80
70
60
50
40
30
20
10
0
10
100
1k
10k
Frequency (Hz)
P
S
R
R
(
d
B
)
100k
1M
10M
I
OUT
= 200mA
I
OUT
= 100mA
I
OUT
= 1mA
C
NR
= 0.01
F
C
OUT
= 2.2
F
T
J
(
C)
600
500
400
300
200
100
0
I
G
N
D
(
n
A
)
V
EN
= 0.4V
V
IN
= 6.5V
V
IN
= 3.2V
-
40
-
25
5
35
65
95
50
125
-
15
20
80
110
TPS799xx
SBVS056E JANUARY 2005 REVISED OCTOBER 2005
TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (T
J
=- 40C to +125C), V
IN
=V
OUT(TYP)
+ 0.3V or 2.7V, whichever is greater; I
OUT
=1mA,
V
EN
= V
IN
, C
OUT
=2.2F, C
NR
=0.01F, unless otherwise noted. For TPS79901, V
OUT
=3.0V. Typical values are at T
J
=+25C.
GROUND PIN CURRENT vs
TPS799285 GROUND PIN CURRENT vs
INPUT VOLTAGE
JUNCTION TEMPERATURE
Figure 9.
Figure 10.
GROUND PIN CURRENT (DISABLED) vs
TPS799285 POWER-SUPPLY RIPPLE REJECTION vs
JUNCTION TEMPERATURE
FREQUENCY (V
IN
- V
OUT
= 1.0V)
Figure 11.
Figure 12.
6
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90
80
70
60
50
40
30
20
10
0
10
100
1k
10k
Frequency (Hz)
P
S
R
R
(
d
B
)
100k
1M
10M
I
OUT
= 100mA
I
OUT
= 1mA
I
OUT
= 200mA
C
NR
= 0.01
F
C
OUT
= 2.2
F
90
80
70
60
50
40
30
20
10
0
10
100
1k
10k
Frequency (Hz)
P
S
R
R
(
d
B
)
100k
1M
10M
I
OUT
= 1mA
I
OUT
= 100mA
I
OUT
= 200mA
C
NR
= 0.01
F
C
OUT
= 2.2
F
90
80
70
60
50
40
30
20
10
0
10
100
1k
10k
Frequency (Hz)
P
S
R
R
(
d
B
)
100k
1M
10M
I
OUT
= 1mA
I
OUT
= 200mA
C
NR
= 0.01
F
C
OUT
= 10.0
F
90
80
70
60
50
40
30
20
10
0
10
100
1k
10k
Frequency (Hz)
P
S
R
R
(
d
B
)
100k
1M
10M
I
OUT
= 1mA
I
OUT
= 200mA
C
NR
= 0.01
F
C
OUT
= 10.0
F
90
80
70
60
50
40
30
20
10
0
10
100
1k
10k
Frequency (Hz)
P
S
R
R
(
d
B
)
100k
1M
10M
I
OUT
= 200mA
C
NR
= None
C
OUT
= 10.0
F
I
OUT
= 1mA
90
80
70
60
50
40
30
20
10
0
P
S
R
R
(
d
B
)
0.0
1.0
1.5
0.5
2.0
2.5
V
IN
-
V
OUT
(V)
3.0
3.5
4.0
0.1kHz
10kHz
1kHz
100kHz
1MHz
C
NR
= 0.01
F
C
OUT
= 2.2
F
TPS799xx
SBVS056E JANUARY 2005 REVISED OCTOBER 2005
TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (T
J
=- 40C to +125C), V
IN
=V
OUT(TYP)
+ 0.3V or 2.7V, whichever is greater; I
OUT
=1mA,
V
EN
= V
IN
, C
OUT
=2.2F, C
NR
=0.01F, unless otherwise noted. For TPS79901, V
OUT
=3.0V. Typical values are at T
J
=+25C.
TPS799285 POWER-SUPPLY RIPPLE REJECTION vs
TPS799285 POWER-SUPPLY RIPPLE REJECTION vs
FREQUENCY (V
IN
- V
OUT
= 0.5V)
FREQUENCY (V
IN
- V
OUT
= 0.25V)
Figure 13.
Figure 14.
TPS799285 POWER-SUPPLY RIPPLE REJECTION vs
TPS799285 POWER-SUPPLY RIPPLE REJECTION vs
FREQUENCY (V
IN
- V
OUT
= 1.0V)
FREQUENCY (V
IN
- V
OUT
= 0.25V)
Figure 15.
Figure 16.
TPS799285 POWER-SUPPLY RIPPLE REJECTION vs
POWER-SUPPLY RIPPLE REJECTION vs
FREQUENCY (V
IN
- V
OUT
= 1.0V)
V
IN
- V
OUT
, I
OUT
= 1mA
Figure 17.
Figure 18.
7
www.ti.com
90
80
70
60
50
40
30
20
10
0
0.0
1.0
1.5
0.5
2.0
2.5
V
IN
-
V
OUT
(V)
P
S
R
R
(
d
B
)
3.0
3.5
4.0
0.1kHz
1kHz
10kHz
100kHz
1MHz
C
NR
= 0.01
F
C
OUT
= 2.2
F
90
80
70
60
50
40
30
20
10
0
0.0
1.0
1.5
0.5
2.0
2.5
V
IN
-
V
OUT
(V)
P
S
R
R
(
d
B
)
3.0
3.5
4.0
0.1kHz
100kHz
1kHz
10kHz
1MHz
C
NR
= 0.01
F
C
OUT
= 2.2
F
200
180
160
140
120
100
80
60
40
20
0
0.01
0.1
1
C
NR
(nF)
10
I
OUT
= 1mA
C
OUT
= 2.2
F
T
o
t
a
l
N
o
i
s
e
(
V
r
m
s
)
35
30
25
20
15
10
5
0
0
5
10
15
20
C
OUT
(
F)
T
o
t
a
l
N
o
i
s
e
(
V
r
m
s
)
25
I
OUT
= 1mA
C
NR
= 0.01
F
20
s/div
20mV/div
20mV/div
1V/div
V
OUT
V
OUT
V
IN
I
OUT
= 150mA
dV
IN
dt
= 1V/
s
C
OUT
= 10
F
C
OUT
= 2.2
F
3.15V
4.15V
20
s/div
100mV/div
100mV/div
100mA/div
I
OUT
I
OUT
I
OUT
C
OUT
= 2.2
F
C
OUT
= 10
F
V
IN
= 3.35V
150mA
1mA
TPS799xx
SBVS056E JANUARY 2005 REVISED OCTOBER 2005
TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (T
J
=- 40C to +125C), V
IN
=V
OUT(TYP)
+ 0.3V or 2.7V, whichever is greater; I
OUT
=1mA,
V
EN
= V
IN
, C
OUT
=2.2F, C
NR
=0.01F, unless otherwise noted. For TPS79901, V
OUT
=3.0V. Typical values are at T
J
=+25C.
POWER-SUPPLY RIPPLE REJECTION vs
POWER-SUPPLY RIPPLE REJECTION vs
V
IN
- V
OUT
, I
OUT
= 100mA
V
IN
- V
OUT
, I
OUT
= 200mA
Figure 19.
Figure 20.
TPS799285
TPS799285
TOTAL NOISE vs C
NR
TOTAL NOISE vs C
OUT
Figure 21.
Figure 22.
TPS799285
TPS799285
LINE TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
Figure 23.
Figure 24.
8
www.ti.com
10
s/div
1V/div
4V/div
V
OUT
V
IN
0V
3.85V
R
LOAD
= 2.85k
C
OUT
= 2.2
F, 10
F
R
LOAD
= 19
C
OUT
= 2.2
F
10
s/div
1V/div
5V/div
V
OUT
V
EN
R
LOAD
= 19
,
2.85k
C
OUT
= 2.2
F
R
LOAD
= 19
,
2.85k
C
OUT
= 10
F
V
IN
= 3.85V
50ms/div
V
o
l
t
s
7
6
5
4
3
2
1
0
-
1
V
IN
V
OUT
R
L
= 19
TPS799xx
SBVS056E JANUARY 2005 REVISED OCTOBER 2005
TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (T
J
=- 40C to +125C), V
IN
=V
OUT(TYP)
+ 0.3V or 2.7V, whichever is greater; I
OUT
=1mA,
V
EN
= V
IN
, C
OUT
=2.2F, C
NR
=0.01F, unless otherwise noted. For TPS79901, V
OUT
=3.0V. Typical values are at T
J
=+25C.
TPS799285
TPS799285
TURN-ON RESPONSE (V
EN
= V
IN
)
ENABLE RESPONSE
Figure 25.
Figure 26.
TPS799285
POWER-UP / POWER-DOWN
Figure 27.
9
www.ti.com
APPLICATION INFORMATION
TPS799xx
GND
EN
NR
IN
OUT
V
IN
V
OUT
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
Optional bypass capacitor
to reduce output noise
and increase PSRR.
2.2
F
Ceramic
V
EN
TPS799xx
GND
EN
FB
IN
OUT
V
IN
V
OUT
R
1
C
FB
R
2
Optional input capacitor.
May improve source
impedance, noise, or PSRR.
V
OUT
=
1.193
(R
1
+ R
2
)
R
2
V
EN
2.2
F
Ceramic
Input and Output Capacitor Requirements
Feedback Capacitor Requirements (TPS79901 only)
TPS799xx
SBVS056E JANUARY 2005 REVISED OCTOBER 2005
The TPS799xx family of LDO regulators combines the high performance required of many RF and precision
analog applications with ultra-low current consumption. High PSRR is provided by a high gain, high bandwidth
error loop with good supply rejection at very low headroom (V
IN
V
OUT
). Fixed voltage versions provide a noise
reduction pin to bypass noise generated by the bandgap reference and to improve PSRR while a quick-start
circuit fast-charges this capacitor at startup for quick startup times. The combination of high performance and low
ground current also make the TPS799xx an excellent choice for portable applications. All versions have thermal
and over-current protection and are fully specified from 40C to +125C.
Figure 28
shows the basic circuit connections for fixed voltage models.
Figure 29
gives the connections for the
adjustable output version (TPS79901). R
1
and R
2
can be calculated for any output voltage using the formula in
Figure 29
. Sample resistor values for common output voltages are shown in
Figure 29
.
Figure 28. Typical Application Circuit for
Figure 29. Typical Application Circuit for
Fixed Voltage Versions
Adjustable Voltage Version
Although an input capacitor is not required for stability, it is good analog design practice to connect a 0.1F to
1F low ESR capacitor across the input supply near the regulator. This will counteract reactive input sources and
improve transient response, noise rejection, and ripple rejection. A higher-value capacitor may be necessary if
large, fast rise-time load transients are anticipated or the device is located several inches from the power source.
If source impedance is not sufficiently low, a 0.1F input capacitor may be necessary to ensure stability.
The TPS799xx is designed to be stable with standard ceramic capacitors of values 2.2F or larger. X5R and
X7R type capacitors are best as they have minimal variation in value and ESR over temperature. Maximum ESR
should be < 1.0
.
The feedback capacitor, C
FB
, shown in
Figure 29
is required for stability. For a parallel combination of R
1
and R
2
equal to 250k
, any value from 3pF to 1nF can be used. Fixed voltage versions have an internal 30pF feedback
capacitor which is quick-charged at start-up. The adjustable version does not have this quick-charge circuit, so
values below 5pF should be used to ensure fast startup; values above 47pF can be used to implement an output
voltage soft-start. Larger value capacitors also improve noise slightly. The TPS79901 is stable in unity-gain
configuration (OUT tied to FB) without C
FB
.
10
www.ti.com
Output Noise
V
N
+
10.7
m
V
RMS
V
*
V
OUT
(1)
Board Layout Recommendations to Improve PSRR and Noise Performance
Internal Current Limit
Shutdown
Dropout Voltage
Startup
TPS799xx
SBVS056E JANUARY 2005 REVISED OCTOBER 2005
In most LDOs, the bandgap is the dominant noise source. If a noise reduction capacitor (C
NR
) is used with the
TPS799xx, the bandgap does not contribute significantly to noise. Instead, noise is dominated by the output
resistor divider and the error amplifier input. To minimize noise in a given application, use a 0.01F noise
reduction capacitor; for the adjustable version, smaller value resistors in the output resistor divider reduce noise.
A parallel combination that gives 2A of divider current will have the same noise performance as a fixed voltage
version. To further optimize noise, equivalent series resistance of the output capacitor can be set to
approximately 0.2
. This configuration maximizes phase margin in the control loop, reducing total output noise
by up to 10%.
Noise can be referred to the feedback point (FB pin) such that with C
NR
= 0.01F total noise is approximately
given by
Equation 1
:
The TPS79901 adjustable version does not have the noise-reduction pin available, so ultra-low noise operation is
not possible. Noise can be minimized according to the above recommendations.
To improve ac performance such as PSRR, output noise, and transient response, it is recommended that the
board be designed with separate ground planes for V
IN
and V
OUT
, with each ground plane connected only at the
GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the
GND pin of the device.
The TPS799xx internal current limit helps protect the regulator during fault conditions. During current limit, the
output will source a fixed amount of current that is largely independent of output voltage. For reliable operation,
the device should not be operated in current limit for extended periods of time.
The PMOS pass element in the TPS799xx has a built-in body diode that conducts current when the voltage at
OUT exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is
anticipated, external limiting may be appropriate.
The enable pin (EN) is active high and is compatible with standard and low voltage TTL-CMOS levels. When
shutdown capability is not required, EN can be connected to IN.
The TPS799xx uses a PMOS pass transistor to achieve low dropout. When (V
IN
V
OUT
) is less than the dropout
voltage (V
DO
), the PMOS pass device is in its linear region of operation and the input-to-output resistance is the
R
DS,ON
of the PMOS pass element. Because the PMOS device behaves like a resistor in dropout, V
DO
will
approximately scale with output current.
As with any linear regulator, PSRR and transient response are degraded as (V
IN
V
OUT
) approaches dropout.
This effect is shown in
Figure 18
through
Figure 20
in the Typical Characteristics section.
Fixed voltage versions of the TPS799xx use a quick-start circuit to fast-charge the noise reduction capacitor,
C
NR
, if present (see Functional Block Diagrams,
Figure 1
). This allows the combination of very low output noise
and fast start-up times. The NR pin is high impedance so a low leakage C
NR
capacitor must be used; most
ceramic capacitors are appropriate in this configuration.
Note that for fastest startup, V
IN
should be applied first, then the enable pin (EN) driven high. If EN is tied to IN,
startup will be somewhat slower. Refer to
Figure 25
and
Figure 26
in the Typical Characteristics section. The
quick-start switch is closed for approximately 135s. To ensure that C
NR
is fully charged during the quick-start
time, a 0.01F or smaller capacitor should be used.
11
www.ti.com
Transient Response
Under-Voltage Lock-Out (UVLO)
Minimum Load
Thermal Information
Thermal Protection
Power Dissipation
P
D
+
V
IN
*
V
OUT
@
I
OUT
(2)
Package Mounting
TPS799xx
SBVS056E JANUARY 2005 REVISED OCTOBER 2005
As with any regulator, increasing the size of the output capacitor will reduce over/undershoot magnitude but
increase duration of the transient response. In the adjustable version, adding C
FB
between OUT and FB will
improve stability and transient response. The transient response of the TPS799xx is enhanced by an active
pull-down that engages when the output overshoots by approximately 5% or more when the device is enabled.
When enabled, the pull-down device behaves like a 350
resistor to ground.
The TPS799xx utilizes an under-voltage lock-out circuit to keep the output shut off until internal circuitry is
operating properly. The UVLO circuit has a de-glitch feature so that it will typically ignore undershoot transients
on the input if they are less than 50s duration.
The TPS799xx is stable and well-behaved with no output load. To meet the specified accuracy, a minimum load
of 500A is required. Below 500A at junction temperatures near +125C, the output can drift up enough to
cause the output pull-down to turn on. The output pull-down will limit voltage drift to 5% typically but ground
current could increase by approximately 50A. In typical applications, the junction cannot reach high
temperatures at light loads since there is no appreciable dissipated power. The specified ground current would
then be valid at no load in most applications.
Thermal protection disables the output when the junction temperature rises to approximately +165C, allowing
the device to cool. When the junction temperature cools to approximately +145C the output circuitry is again
enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection
circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage due to
overheating.
Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate
heatsink. For reliable operation, junction temperature should be limited to +125C maximum. To estimate the
margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal
protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should
trigger at least +35C above the maximum expected ambient condition of your particular application. This
configuration produces a worst-case junction temperature of +125C at the highest expected ambient
temperature and worst-case load.
The internal protection circuitry of the TPS799xx has been designed to protect against overload conditions. It
was not intended to replace proper heatsinking. Continuously running the TPS799xx into thermal shutdown will
degrade device reliability.
The ability to remove heat from the die is different for each package type, presenting different considerations in
the PCB layout. The PCB area around the device that is free of other components moves the head from the
device to the ambient air. Performance data for JEDEC low- and high-K boards are given in the Dissipation
Ratings
table. Using heavier copper will increase the effectiveness in removing heat from the device. The
addition of plated through-holes to heat-dissipating layers will also improve the heatsink effectiveness.
Power dissipation depends on input voltage and load conditions. Power dissipation is equal to the product of the
output current time the voltage drop across the output pass element, as shown in
Equation 2
:
Solder pad footprint recommendations for the TPS799xx are available from the Texas Instruments' web site at
www.ti.com
.
12
www.ti.com
1,416
1,316
Pin A1 Index Area
0,35
0,25
0,30
0,20
1,052
0,952
0,625 Max
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. NanoStar
TM
package configuration.
NanoStar is a trademark of Texas Instruments.
TPS799xx
SBVS056E JANUARY 2005 REVISED OCTOBER 2005
Thermal Information (continued)
Figure 30. YZU Wafer Chip-Scale Preliminary Package Dimensions (mm)
13
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
TPS79901DDCR
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79901DDCRG4
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79901DDCT
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79901DDCTG4
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79901DRVR
ACTIVE
SON
DRV
6
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79901DRVT
ACTIVE
SON
DRV
6
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79901YZUR
ACTIVE
DSBGA
YZU
5
3000 Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79901YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79912YZUR
ACTIVE
DSBGA
YZU
5
3000 Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79912YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79915DDCR
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79915DDCRG4
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79915DDCT
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79915DDCTG4
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79918DDCR
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79918DDCRG4
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79918DDCT
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79918DDCTG4
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79918DRVR
ACTIVE
SON
DRV
6
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79918DRVT
ACTIVE
SON
DRV
6
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79918YZUR
ACTIVE
DSBGA
YZU
5
3000 Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79918YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79919YZUR
ACTIVE
DSBGA
YZU
5
3000 Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79919YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79925DDCR
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com
5-Dec-2005
Addendum-Page 1
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
TPS79925DDCRG4
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79925DDCT
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79925DDCTG4
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79925YZUR
ACTIVE
DSBGA
YZU
5
3000 Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79925YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79927DRVR
ACTIVE
SON
DRV
6
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79927DRVT
ACTIVE
SON
DRV
6
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79927YZUR
ACTIVE
DSBGA
YZU
5
3000 Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79927YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS799285DDCR
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS799285DDCRG4
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS799285DDCT
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS799285DDCTG4
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS799285YZUR
ACTIVE
DSBGA
YZU
5
3000 Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS799285YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79928DDCR
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79928DDCRG4
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79928DDCT
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79928DDCTG4
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79928DRVR
ACTIVE
SON
DRV
6
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79928DRVT
ACTIVE
SON
DRV
6
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79928YZUR
ACTIVE
DSBGA
YZU
5
3000 Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79928YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79930DDCR
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79930DDCRG4
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79930DDCT
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com
5-Dec-2005
Addendum-Page 2
Orderable Device
Status
(1)
Package
Type
Package
Drawing
Pins Package
Qty
Eco Plan
(2)
Lead/Ball Finish
MSL Peak Temp
(3)
TPS79930DDCTG4
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79930YZUR
ACTIVE
DSBGA
YZU
5
3000 Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79930YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79933DDCR
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79933DDCRG4
ACTIVE
TO/SOT
DDC
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79933DDCT
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79933DDCTG4
ACTIVE
TO/SOT
DDC
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS79933YZUR
ACTIVE
DSBGA
YZU
5
3000 Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
TPS79933YZUT
ACTIVE
DSBGA
YZU
5
250
Green (RoHS &
no Sb/Br)
SNAG
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco
Plan
-
The
planned
eco-friendly
classification:
Pb-Free
(RoHS)
or
Green
(RoHS
&
no
Sb/Br)
-
please
check
http://www.ti.com/productcontent
for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com
5-Dec-2005
Addendum-Page 3
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